RT9823 1 ds9823-02 june 2011 www.richtek.com pin configurations (top view) ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. sot-23-6 smart multi-voltage detector features z z z z z capable of monitoring two inputs precisely z z z z z vcc connect to 5v or 3.3v standby power z z z z z detection threshold voltages ` ` ` ` ` v5 : 5v x 80% ` ` ` ` ` vadj : 1v (using resistor divider) z z z z z accuracy : 2% z z z z z ctr (open drain output active low) z z z z z built-in recovery delay 300ms z z z z z manual ctr (mr) function z z z z z sot-23-6 package z z z z z rohs compliant and halogen free applications z lcd tv or monitors z consumer electronic products z system voltage detector marking information es= : product code dnn : date code general description the RT9823 is an integrated smart multi voltage detector supervising two power supply voltage levels including 5v, and another voltage (such as 3.3v or 12v) , which can be set via an external resistive voltage divider. the RT9823 performs supervisory function by sending out a ctr signal whenever the monitored voltages fall below 80% of the voltage levels. the ctr signal will last the whole period before vcc recovers. once the supervising voltages are recovered to higher than 80% of the voltage levels, the ctr signal will be released after a 300ms delay time. mr (manual reset) controls the ctr signal when the two monitored power supply voltages are at normal voltage levels. when the mr signal is in logic high, the ctr signal will be pulled low immediately. the RT9823 is available in a sot-23-6 package. es=dnn gnd mr vcc v5 vadj ctr 4 23 5 6 package type e : sot-23-6 RT9823 lead plating system g : green (halogen free and pb free)
RT9823 2 ds9823-02 june 2011 www.richtek.com function block diagram pin no. pin name pin function 1 ctr reset output (open drain, active-low) . when v cc > por, v5 > 80%, and v adj > 1v, ctr will delay 300ms and become high. once v5 or v adj is < 80%, the signal will become low. when mr is high, ctr will become low. 2 gnd ground. 3 mr manual reset input. manual reset with internal pull high resister (1m ) , h : ctr = low; l : ctr signal is dependent on voltage detector output. 4 vadj voltage detection input. connect 12v or other power with external resistive voltage divider to this pin. the v adj logic-high threshold voltage is 1v. 5 v5 5v voltage detection input. the detection threshold is 5v x 80%. 6 vcc supply input. connect this pin to standby power from system. functional pin description typical application circuit gnd mr vcc v5 vadj RT9823 3.3v or 5v 12v manual reset 5v 1 2 6 4 3 5 ctr r1 r2 p vdd 100k pull up reset delay 300ms voltage regulator por voltage detector (v th = 1v) mr vcc v5 vadj v ref voltage detector (v th = 5v x 80%) ctr gnd
RT9823 3 ds9823-02 june 2011 www.richtek.com electrical characteristics parameter symbol test conditions min typ max unit vcc supply current i vcc without load -- -- 200 a vcc operating voltage v cc 2.97 5 5.94 v vcc por rising v por -- 2.8 -- v vcc por hysteresis v por_hys -- 0.15 -- v voltage detector & mute threshold v5 high threshold voltage v v5_th 3.92 4 4.08 v vadj high threshold voltage v va d j_ th 0.98 1 1.02 v logic-high v ih 2 -- -- v manual reset input threshold voltage logic-low v il -- -- 0.8 v voltage detector deglitch and delay voltage detectors delay time t delay 200 300 -- ms voltage detectors deglitch time t deglitch -- 20 -- s output : open drain ctr output low voltage v ol_ctr v cc = 3.3v, 5ma sinking current at ctr output -- -- 0.3 v recommended operating conditions (note 4) z junction temperature range ------------------------------------------------------------------------------------------- ? 40 c to 125 c absolute maximum ratings (note 1) z vcc, mr, ctr, v5, vadj ----------------------------------------------------------------------------------------------- ? 0.3v to 6.5v z power dissipation, p d @ t a = 25 c sot-23-6 --------------------------------------------------------------------------------------------------------------------- 0.4w z package thermal resistance (note 2) sot-23-6, ja --------------------------------------------------------------------------------------------------------------- 250 c/w sot-23-6, jc -------------------------------------------------------------------------------------------------------------- 135 c/w z junction temperature ----------------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------------- 260 c z storage temperature range --------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ----------------------------------------------------------------------------------------------- 2kv mm (machine mode) ------------------------------------------------------------------------------------------------------ 200v (v cc = 5v, t a = 25 c, unless otherwise specified) note 1. stresses listed as the above ? absolute maximum ratings ? may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device is reliability. note 2. ja is measured in natural convection at t a = 25 c on a low-effective thermal conductivity test board of jedec 51-3 thermal measurement standard. the measurement case position of jc is on the lead of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
RT9823 4 ds9823-02 june 2011 www.richtek.com typical operating characteristics vadj detector delay time vs. temperature 250 275 300 325 350 375 400 425 450 -50-250 255075100125 temperature (c) vadj detector delay time (ms) v cc = 5v v cc = 3.3v v5 detector delay time vs. temperature 250 275 300 325 350 375 400 425 450 -50 -25 0 25 50 75 100 125 temperature (c) v5 detector delay time (ms) v cc = 5v v cc = 3.3v vadj detector deglitch time vs. temperature 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 125 temperature (c) vadj detector deglitch time ( s) v cc = 5v v cc = 3.3v v5 detector deglitch time vs. temperature 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 125 temperature (c) v5 detector deglitch time ( s) v cc = 5v v cc = 3.3v vadj pin response time (100ms/div) vadj (1v/div) v cc = 5v ctr (5v/div) v5 pin response time (100ms/div) v5 (5v/div) v cc = 5v ctr (5v/div)
RT9823 5 ds9823-02 june 2011 www.richtek.com supply current vs. temperature 100 125 150 175 200 225 250 -50 -25 0 25 50 75 100 125 temperature (c) supply current ( a ) v cc = 5v v cc = 3.3v mr pin response time (5ms/div) mr (5v/div) v cc = 5v ctr (5v/div)
RT9823 6 ds9823-02 june 2011 www.richtek.com application information the RT9823 smart voltage detector monitors two voltage levels at the same time to ensure that the micro processor is operated within the recommended input voltage range. in conventional reset ic application, to monitor one power rail needs one reset ic. the RT9823 can monitor two power rails simultaneously, by using just one reset ic. the RT9823 also provides a manual reset (mr) function for easy application. glitch rejection is implemented in the RT9823 to prevent false operation and eliminate additional de-bouncing circuitry. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications of the RT9823, the maximum junction temperature is 125 c and t a is the ambient temperature. the junction to ambient thermal resistance, ja , is layout dependent. for sot- 23-6 packages, the thermal resistance, ja , is 250 c/w on a standard jedec 51-3 single-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (250 c/w) = 0.4w for sot-23-6 package the maximum power dissipation depends on the operating ambient temperature for fixed t j (max) and thermal resistance, ja . for the RT9823 package, the derating curve in figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 1. derating curves for RT9823 package 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0255075100125 ambient temperature (c) maximum power dissipation (w) 1 single layer pcb
RT9823 7 ds9823-02 june 2011 www.richtek.com richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property infringemen t of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications is assumed b y richtek. richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension a a1 e b b d c h l sot-23-6 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.889 1.295 0.031 0.051 a1 0.000 0.152 0.000 0.006 b 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 c 2.591 2.997 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024
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